1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device.
2. Description of the Related Art
With further increase in capacity of memory, micro fabrication of cell size further advances in nonvolatile semiconductor memories, for example, flash memories. At the same time, it is necessary not to reduce the coupling ratio in a memory cell.
As a technique of increasing the coupling ratio of a memory cell, considering device structure, there is, for example, a structure (hereinafter, referred to as stereoscopic memory cell structure) in which a control gate electrode covers the lateral surface of a floating gate electrode in the channel longitudinal direction (in the direction orthogonal to the direction of a word line extending as the control gate electrode).
In the stereoscopic memory cell structure, however, problems about interference between the adjacent cells and space for embedding an insulating film between the adjacent cells are inevitable according to the micro fabrication of a memory cell. Therefore, a structure (hereinafter, referred to as a flat cell structure) in which a control gate electrode does not cover the lateral surface of a floating gate electrode in its channel longitudinal direction is preferable.
In order to increase the coupling ratio in the flat cell structure, with respect to a material, for example, a high dielectric constant material (so called High-k material) having a higher dielectric constant than that of SiO2/SiN/SiO2 (hereinafter, referred to as ONO film) is used for an inter-electrode insulating film between a floating gate electrode and a control gate electrode (for example, refer to JP-A 2006-203200 (KOKAI) and JP-A 2004-158810 (KOKAI)).
Here, care should be taken to the fact that a high electric field is applied on the inter-electrode insulating film in the flat cell structure. In other words, the inter-electrode insulating film has to have a small leak current from a region of low electric field to a region of high electric field, as well as a high dielectric constant.
This is true in a memory cell formed by an insulating film having a charge storage layer of trap function, for example, in a memory cell of the MONOS (metal-oxide-nitride-oxide-silicon) structure. Namely, a block insulating film between a charge storage layer and a control gate electrode is required to have a high dielectric constant and less leak current in the region of high electric field.
In the progress of micro fabrication of a memory cell, a material having this quality has not been fully considered so far.
When forming an inter-electrode insulating film or a block insulating film of high dielectric constant material, it is preferable that the high dielectric constant material is amorphous.
This fabrication process of a memory cell is accompanied by the thermal processing at a high temperature of 900 to 1000° C.
This thermal processing induces the amorphous high dielectric constant material to crystallize and causes the memory cell to deteriorate in electrical characteristic.
Accordingly, it is necessary to develop an inter-electrode insulating film and a block insulating film having a high stability against heat capable of remaining amorphous even after the thermal processing of high temperature.